scas101 ? d3420, february 1990 ? revised april 1993 post office box 655303 ? dallas, texas 75265 copyright ? 1993, texas instruments incorporated 2?1 ? contains eight d-type flip-flops ? clock enable latched to avoid false clocking ? applications include: buffer/storage registers, shift registers, pattern generators ? flow-through architecture optimizes pcb layout ? center-pin v cc and gnd configuration minimizes high-speed switching noise ? epic (enhanced-performance implanted cmos) 1- m process ? 500-ma t ypical latch-up immunity at 125 c ? package options include plastic small outline packages and standard plastic 300-mil dips description these circuits are positive-edge-triggered d-type flip-flops with a clock enable input. information at the d inputs meeting the setup time requirements is transferred to the q outputs on the positive-going edge of the clock pulse if clken is low. clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. when the clock input is at either the high or low level, the d input signal has no effect at the output. the circuits are designed to prevent false clocking by transitions at the clken input. the 74ac11377 is characterized for operation from ? 40 c to 85 c. function table (each flip-flop) inputs output clken clk d output q h x x q 0 l hh l ll x l x q 0 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 1q 2q 3q 4q gnd gnd gnd gnd 5q 6q 7q 8q clken 1d 2d 3d 4d v cc v cc 5d 6d 7d 8d clk dw or nt package (top view) epic is a trademark of texas instruments incorporated.
scas101 ? d3420, february 1990 ? revised april 1993 post office box 655303 ? dallas, texas 75265 2?2 logic symbol ? logic diagram (positive logic) c1 c1 c1 ? this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12. 8d 7d 6d 5d 4d 3d 2d 1d clk clken 14 15 16 17 20 21 22 23 13 24 8q 7q 6q 5q 4q 3q 2q 1q 12 11 10 9 4 3 2 1 2d 1c2 g1 8d 7d 6d 5d 4d 3d 2d 1d clk clken 14 15 16 17 20 21 22 23 15 24 8q 7q 6q 5q 4q 3q 2q 1q 12 11 10 9 4 3 2 1 1d c1 1d c1 1d c1 1d c1 1d c1 1d 1d 1d absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range, v cc ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (see note 1) ? 0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage range, v o (see note 1) ? 0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0 or v i > v cc ) 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0 or v o > v cc ) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current, i o (v o = 0 to v cc ) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v cc or gnd 200 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range ? 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only an d functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditi ons? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. note 1: the input and output voltage ratings may be exceeded if the input and output current ratings are observed.
scas101 ? d3420, february 1990 ? revised april 1993 post office box 655303 ? dallas, texas 75265 2?3 recommended operating conditions min nom max unit v cc supply voltage 3 5 5.5 v v cc = 3 v 2.1 v ih high-level input voltage v cc = 4.5 v 3.15 v v ih high-level input voltage v cc = 5.5 v 3.85 v v cc = 3 v 0.9 v il low-level input voltage v cc = 4.5 v 1.35 v v il low-level input voltage v cc = 5.5 v 1.65 v v i input voltage 0 v cc v v o output voltage 0 v cc v v cc = 3 v ?4 i oh high-level output current v cc = 4.5 v ?24 ma i oh high-level output current v cc = 5.5 v ?24 ma v cc = 3 v 12 i ol low-level output current v cc = 4.5 v 24 ma i ol low-level output current v cc = 5.5 v 24 ma t/ v input transition rise or fall rate 0 10 ns / v t a operating free-air temperature ?40 85 c electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc t a = 25 c min max unit parameter test conditions v cc min typ max min max unit 3 v 2.9 2.9 i oh = ? 50 a 4.5 v 4.4 4.4 i oh = ? 50 a 5.5 v 5.4 5.4 v oh i oh = ? 4 ma 3 v 2.58 2.48 v v oh i oh = ? 24 ma 4.5 v 3.94 3.8 v i oh = ? 24 ma 5.5 v 4.94 4.8 i oh = ? 75 ma 5.5 v 3.85 3 v 0.1 0.1 i ol = 50 a 4.5 v 0.1 0.1 i ol = 50 a 5.5 v 0.1 0.1 v ol i ol = 12 ma 3 v 0.36 0.44 v v ol i ol = 24 ma 4.5 v 0.36 0.44 v i ol = 24 ma 5.5 v 0.36 0.44 i ol = 75 ma 5.5 v 1.65 i i v i = v cc or gnd 5.5 v 0.1 1 a i cc v i = v cc or gnd, i o = 0 5.5 v 8 80 a c i v i = v cc or gnd 5 v 4 pf ? not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
scas101 ? d3420, february 1990 ? revised april 1993 post office box 655303 ? dallas, texas 75265 2?4 timing requirements over recommended operating free-air temperature range, v cc = 3.3 v 0.3 v (unless otherwise noted) (see figure 1) t a = 25 c min max unit min max min max unit f clock clock frequency 0 60 0 60 mhz t w pulse duration clk high 5 5 ns t w pulse duration clk low 5 5 ns data high 6 6 t su setup time before clk clken high 9 9 ns clken low 9 9 t h hold time after clk clken inactive or active, data 0 0 ns timing requirements over recommended operating free-air temperature range, v cc = 5 v 0.5 v (unless otherwise noted) (see figure 1) t a = 25 c min max unit min max min max unit f clock clock frequency 0 100 0 100 mhz t w pulse duration clk high 5 5 ns t w pulse duration clk low 5 5 ns data high or low 4 4 t su setup time before clk clken high 6 6 ns t su setup time before clk clken inactive or active, data 0 0 ns switching characteristics over recommended operating free-air temperature range, v cc = 3.3 v 0.3 v (unless otherwise noted) (see figure 1) parameter from to t a = 25 c min max unit parameter from (input) to (output) min typ max min max unit f max 60 60 mhz t plh clk any q 4 9.8 15.7 4 17.9 ns t phl clk any q 4.9 11.4 18 4.9 19.9 ns switching characteristics over recommended operating free-air temperature range, v cc = 5 v 0.5 v (unless otherwise noted) (see figure 1) parameter from to t a = 25 c min max unit parameter from (input) to (output) min typ max min max unit f max 100 100 mhz t plh clk any q 3.3 6.6 9.9 3.3 11.3 ns t phl clk any q 4.1 7.8 11.5 4.1 12.9 ns operating characteristics, v cc = 5 v, t a = 25 c parameter test conditions typ unit c pd power dissipation capacitance c l = 50 pf, f = 1 mhz 72 pf
scas101 ? d3420, february 1990 ? revised april 1993 post office box 655303 ? dallas, texas 75265 2?5 parameter measurement information 50% v cc 50% 50% 50% v cc v cc 0 v 0 v t h t su voltage waveforms data input t plh t phl t phl t plh v oh v oh v ol v ol 50% 50% v cc 0 v 50% v cc 50% v cc input (see note b) out-of-phase output in-phase output timing input (see note b) 50% v cc voltage waveforms v cc 0 v 50% 50% t w voltage waveforms input load circuit from output under test c l = 50 pf (see note a) 500 ? notes: a. c l includes probe and jig capacitance. b. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 ? , t r = 3 ns, t f = 3 ns. c. the outputs are measured one at a time with one input transition per measurement. figure 1. load circuit and voltage waveforms
scas101 ? d3420, february 1990 ? revised april 1993 post office box 655303 ? dallas, texas 75265 2?6
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 74ac11377dw obsolete soic dw 24 tbd call ti call ti 74ac11377dwr obsolete soic dw 24 tbd call ti call ti 74ac11377dwr obsolete soic dw 24 tbd call ti call ti 74AC11377NT obsolete pdip nt 24 tbd call ti call ti 74AC11377NT obsolete pdip nt 24 tbd call ti call ti (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs) or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 24-jun-2005 addendum-page 1
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